Call for participation
Workshop on Massively Multiprocessor and Multicore Computers
Rocquencourt, 4-5 February 2009

The parallel processor revolution is underway. Modern computer architectures contain several cores; future ones will contain hundreds or thousands. At the same time, architectures are becoming more heterogeneous and memory hierarchies and interconnection networks are increasingly complex.

These new architectures raise a number of issues. How many cores, where to place memory, how to interconnect them? What fault tolerance, what programming model, what languages, to benefit from parallelism while avoiding its drawbacks? How can we educate application programmers to non-determinsim, concurrency control, asynchronous communication, incomplete information, non-uniform memory costs, to fault tolerence, etc.? How can we ensure program performance remains portable between machine models and successive generations?

The democratisation of multi-core architectures brings a new urgency to these old issues. This workship aims to share information about recent research and results, and about the outlook for hardware and software. You are invited to propose a presentation, in particular about any of the following topics:

• Processor, memory and interconnect architectures
• Weak memory models
• Multi-core embedded and real-time systems
• Operating systems, scheduling, temperature and energy management for multi-core
• Self-configuration, fault-tolerance
• Programming languages, models and tools for multi-core
• Designing and proving correct highly-concurrent programs
• Transactional memory, speculative computing, and high-level abstractions
• Locality and performance portability
• Performance analysis and prediction
• Application experience on multi-core systems

• Multicore and applications: what are the killer apps, impact of heterogeneous multicore on applications
• Multicore and languages: parallel programming paradigms and features, parallelism for the masses, static analysis

• Dimitri Komatitsch, Université de Pau (France), Porting a high-order finite-element earthquake modeling application to NVIDIA graphics cards using CUDA
• Maurice Herlihy, Brown U. (Providence RI, USA), The Future of Distributed Computing: Renaissance or Reformation?
• Koen De Bosschere, Universiteit Ghent (Belgium), Multicores: opportunities for dynamic compilation, binary translation and virtualization.
• John Reppy, University of Chicago (USA), Supporting parallelism at multiple levels in Manticore.

This is an informal workshop. Participation is free and open to all; however advance registration is mandatory. No proceedings will be published; however, participants may post material on the workshop web site.

Important links:

• Registration (registration is free but mandatory).
• Programme
• Transportation and hotel information.

Important dates:

• Talks or demos: closed (was 18 December 2009).
• Notification of acceptance: done (6 January 2009)
• Registration opened 6 January 2009
• Workshop : 4-5 February 2009, 9:00-18:00 in Rocquencourt (with free transportation to/from Paris or Versailles).

• David Defour, Université de Perpignan
• Albert Cohen, INRIA & École Polytechnique
• Jean Roman, INRIA Bordeaux-Sud-Ouest & LaBRI, Bordeaux, France
• Marc Shapiro, INRIA & LIP6

Made possible by generous support from INRIA and ASR.